Name: UPPARA SUDHA RANI
Designation: Assistant Professor (Ad-hoc)
Experience: 8 Years 4 Months
Specialization: ECE
Areas of Interest: VLSI & EMBEDDED SYSTEMS IMAGE PROCESSING
Email-Id: sudharani.cek@jntua.ac.in
Mobile-No: +91 9490715659(O)
+91 8463948796(P)
Personal Information:
- Name: U.Sudha Rani, B. Tech. (ECE)-Intell Engg College, Anantapur; M. Tech. (VLSI & Embedded Systems)- Gates Institute of Technology, Gooty; Prusuing Ph.D. (Biomedical Signal using AI &ML)-JNTUA, Anantapur.
- Knowledge of Computers: Python using Anaconda Python, Google Colab, Visual Studio Code, C#, LT Spice, multisim, MS Excel, MS Word, PCB Designing, Xilinx, Electric VLSI, Code Composer Studio, MATLAB.
- Research Interests: Biomedical Signal Processing using AI & ML, Image Processing using AI & ML, VLSI (Front End and Backend), Embedded Systems (MSP430,Tiva,8086,8051) *Participated and gained hands on experience in a Five Day FDP on “Recent trends in ECE-An approach through AI,ML and DL techniques” from 22nd-26th may 2023 at NBKRIST.
- Address for Correspondence: 103 Asst. professor quarters, JNTUACE, Kalikiri. sudha.u.rani@gmail.com
- Contact Phone No: +91 8463948796 (mobile)
- Date of Birth: 29 October 1990
- Nationality: Indian
- Religion: Hindu
- Languages Known: Telugu (Mother tongue), English.
Educational Qualifications:
| Degree/Certificate | University/College/ Board | Year of Passing | % of Marks |
|---|---|---|---|
| Pursuing Ph.D (Image Processing) | J N T University Anantapur, Anantapur | – | – |
| M. Tech. (VLSI & Embedded Systems) | Gates Institute of Technology,Gooty | 2015 | 79 |
| B. Tech.(Electronics and Communications Engineering) | Intell Engineering College, Anantapur | 2012 | 69 |
| Intermediate | Board of Intermediate Education, Anantapur, A. P. | 2008 | 93.1 |
| S.S.C. | Board of Secondary Education, Anantapur, A. P. | 2006 | 87.3 |
Employment Record:
| S.No | Employer | Position held | Period |
|---|---|---|---|
| 1 | JNTUA College of Engineering, Kalikiri | Assistant Professor(Ad-hoc) | 16 July 2015 – Till date |
Professional Experience: At JNTUA College of Engineering Kalikiri
- Project Supervisor: I have 15 UG student projects.
- Teaching: The following subjects were taught to B. Tech.(ECE)
- B.Tech. subjects thought: Pattern recognition and Applications, Biomedical Signal processing, Digital Image Processing, Electronic Devices & Circuits, Digital Communications, MATLAB, Analog Communications, Digital Signal Processing, Signals and Systems, Embedded Systems, Electronic Circuits.
- Laboratories Handled: Embedded Systems, VLSI (Frontend and Backend),MATLAB , Multisim, Communication Systems, PCB Design & Prototype Development.
- Additional Duties: Placement Coordinator for the department of ECE, Program Coordinator for Edu Net Techsaksham,Class Room Chairperson, Organised national level symposium.
- Active member in all Department activities
- Motivating Students on self learning and encouraging them to do industrial standard projects on their own.
Research Publications:
| S.No | JournalPublications & Conference Presentation |
|---|---|
| 1 | A paper “Diabetic kidney Disease Prediction using Machine Learning” Got acceptance for Scopus indexed journal –Journal of Biomedical Engneering through conference ICRACE-2023 to be conducted on 24.06.2023 |
| 2 | A paper published in international conference ICIRTCS-2023 with title“Prediction of Diabetic Nephropathy with machine learning” pg no:82,24th & 25th February 2023. |
| 3 | A paper published in AICTE sponsored ICCCEEE-2020 conference with title: An Overview of Digital Image processing for the analysis of Diabetic Nephropathy Images ,Pg No:47,10th-11th January 2020. |
| 4 | A Springer publication on Medical Imaging and Anomalies in Diabetic Nephropathy published in the month of October,2021 |
| 5 | Paper published in International Journal of Engineering Research ISSN:2319-6890, Volume No.3 Issue No: Special 2, pp: 97-102. |
| 6 | Paper published in International Journal of Embedded and VLSI System- IJEVS with (e-ISSN2349 -8129) |
| 7 | Presented a Paper on “LUT based FIR filter design and implementation on FPGA using faithfully rounded truncated multiple constant multiplication” in AICTE Sponsored NationalConference on “Signal Processing and Communications-2014 (NCSC-2014)” at RGM College of Engg. & Technology, Nandhyal. |
| 8 | Presented a Paper on “Design and Implementation of FIR Filter using Radix 4 Booth Algorithm” in International Conference on Innovations in Electronics & Communication Engineering – (ICIECE – 2014) at Guru Nanak Institutions Technical Campus, Ibrahimpatnam, Hyderabad. |
| 9 | Presented a Paper on “Design & Implementation of FIR Filter on FPGA using DistributedArithmetic” in I International Conference on recent trends in ECE –(ICRTEC-2014) at YSR Institute of Engineering and Technology, Kadapa. |